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Altera_Forum
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19 years ago

Dealing with multiprocessor cache coherency

Hi, I am currently working on a system consisting of four Nios II/f processors. All these processors are configured with instruction and data cache. From what I understand the coherency of data...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
19 years ago

Hi Paolo,

Thank you for you advice. I have decided to without a d-cache for the mean time, will look into your suggestion in the future.

Regards,

Colin