Forum Discussion
Altera_Forum
Honored Contributor
14 years agoYou have misunderstood.
tri_state_bridge_data[7..0] to flash_data[7..0] tri_state_bridge_data[15..0] to sram_data[15..0] They are multiplexed. Tristate bus will automatically drive oe and cs pins to enable only the correct chip when you rd or wr on its address range.