I'm trying to get my hardware/software nios project into the EPCS64 device on the DE2-115 board. It sounds like I need a EPCS controller in my nios project, but when it exports the signals for the controller I can't find the pins in the schematics I'm supposed to connect them to. Where do you find the pins for the EPCS device on this board? I'm following this tutorial: http://www.altera.com/support/kdb/downloads/rd11122013_865/nios%20ii%20boot%20from%20epcq%20and%20epcs%20in%20quartus%20ii%2013.0.pdf It seems like the hardware design is getting in there, but not the software and I think it's because I am unable to assign my reset vector to the EPCS controller without knowing what pins on the FPGA to use.

The EPCS device pins are fixed, i.e., you have no choice as to their pin assignments. The EPCS device is used for Active Serial (AS) configuration, and then once the FPGA enters user-mode, you can access the EPCS device as user SPI flash. If you add the Altera EPCS flash IP core into your design, eg., Qsys, I don't think you need to make any pin assignments, otherwise you can just look at the pin planner view and note which pins correspond to the AS pins and use those in your assignments. Sometimes the Terasic schematics do not show the configuration device page (since it also includes the USB-Blaster circuit). Cheers, Dave

ohhhhh...ok. I exported the pins not even thinking about that. Got ya. So should I just not export the "external signals"? Pic of the epcs module in Qsys is attached to show what I"m talking about. If I do export those I'll have to do what you said and find the pins. https://www.alteraforum.com/forum/attachment.php?attachmentid=9469

--- Quote Start --- So should I just not export the "external signals"? Pic of the epcs module in Qsys is attached to show what I"m talking about. If I do export those I'll have to do what you said and find the pins. --- Quote End --- I don't use the Altera IP, so normally I assign the pins explicitly. Go ahead and try not exporting the pins and see if the tool assigns the pins directly. You can have a look at the .pin file or Pin Planner after place-and-route, or look at the RTL Netlist viewer, and you'll be able to tell if your EPCS controller connects to the pins correctly. Cheers, Dave

Ok. I'll give that a shot. Thanks for checking out my thread and replying!

So far I've found 3/4 pins. The SCE pin is giving me some problems. Do you know where to find it? I have the pin out and Pin information sheets where I found data0, dclk and sdo, but no SCE pin.

DE2-115 schematics don't show EPCS pins | Altera Community

13 Replies

Altera_Forum
Honored Contributor
11 years ago
--- Quote Start ---
Ok sounds good. I'll get on that. Are you saying I should get a .pof file working basically? Load through AS via the Quartus II programmer?
--- Quote End ---

Yes. Your NIOS II core can still be in the design, but if you add a JTAG bridge, then you can use system console to access your design. This would then confirm that booting NIOS II is the problem, rather than the image generation for the EPCS device.

Cheers,
Dave
Altera_Forum
Honored Contributor
11 years ago
--- Quote Start ---
I do have a question.
--- Quote End ---

Sorry, I don't use NIOS II tools, so cannot answer this one. However, I'm pretty sure when you set the reset vector to the EPCS, you are not actually running code out of the EPCS, but out of FPGA RAM that is part of the EPCS bootloader/controller.

Note that *ALL* of your booting questions can be answered by yourself by simulating the NIOS II processor design in Modelsim :)

Cheers,
Dave
Altera_Forum
Honored Contributor
11 years ago
Great Idea. I'm actually very uneducated regarding simulating nios stuff so I need to delve into that very soon. Thanks for the time I really appreciate it!

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DE2-115 schematics don't show EPCS pins

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