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Altera_Forum
Honored Contributor
11 years ago --- Quote Start --- I do have a question. --- Quote End --- Sorry, I don't use NIOS II tools, so cannot answer this one. However, I'm pretty sure when you set the reset vector to the EPCS, you are not actually running code out of the EPCS, but out of FPGA RAM that is part of the EPCS bootloader/controller. Note that *ALL* of your booting questions can be answered by yourself by simulating the NIOS II processor design in Modelsim :) Cheers, Dave