DDR2 & Cyclone II EP2C8

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originally posted by mgilroy@Oct 9 2006, 02:10 PM

any update on how to fix this?

i've the same problem on a cyclone ii dev board.

i've instantiated the design via sopc builder and synthesis fails due to "ddio output nodes could not be placed by the fitter"

renaming the ddr_sdram_0 in sopc builder to ddr_sdram without the trailing "_0" did not fix the problem

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you SHOULD! name the DDR ddr_sdram_0, this was my point (nad NOT! without _0)

you have a different problem, maybe you did not place the DDR signals to dedicated pins, compare the .qsf file of your project with the .qsf file of the Altera development board, check for:

- IO block power supplies

- if DDR pins are SSTL (this should be done automatically by SOPC builder)

if you find it easier you may use the assignment editor

IzI