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Altera_Forum
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21 years ago

DDR vs. SDR RAM...

Anyone know if DDR Ram will fare better with the NiosII data master than SDRAM? After Dirk figured out it takes a whopping 12 clocks @50MHz (~240ns) per SDRAM read when not using the dma, we re...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
21 years ago

Hi James,

We'd be happy to beta test any ideas you implement. We've had some success using a custom instruction to access memory. (In our first case it is reading from an external fifo, but we'll be adding more CI interfaces as we move fwd)

We were dma'ing the fifo into SDRAM at an amazing 1 clock per word, but getting the words out of sdram to operate on them killed us. Now we can CI in 2 clocks into the NiosII to operate on the data - mucha bedda.

We're busy bringing up our new custom Stratix/NiosII board, but soon we'll be back to maximizing firmware execution speed on the NiosII.

If anybody else is interested in this CI approach we&#39;ll be sharing some of our results and who helped us attain them soon. (if you can&#39;t already guess http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif

Ken