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Altera_Forum
Honored Contributor
Honored Contributordataavailable signal on Avalon MM
I have a MM slave that has to read an external device, and due to the latency in the read process to this device, I would like to have my Nios initiate the process by a write to a register and then r...
Altera_ForumHonored Contributor
Honored ContributorLike std_logic_vector said this is what the 'readdatavalid' signal is for. It allows the master to post multiple read requests in order to hide the latency. Alternatively if you have bulk data to move from this high latency interface you could use a DMA instead.
