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Altera_Forum
Honored Contributor
11 years agoData transfer between fpga (14 bits) vhdl block to NIos II system (16 bits)
Hi, I am writing C code to program Altera Nios II system in Cyclone IV E. The Nios II system is used to control some custom FPGA blocks written in VHDL in Quartus II. In the vhdl block ...
Altera_Forum
Honored Contributor
11 years agoLet me see if I understand your flow:
VHDL Block A --> signed 16 bit input to NIOS --> Calculation in NIOS --> signed 16 bit output from NIOS --> VHDL Block B In this flow, the "Calculation in NIOS" is your bottleneck, especially since it seems to be floating point. Why not do: VHDL Block A --> VHDL Calculation Block --> VHDL Block B Say, you don't want to do this... Looking at your C code you use floating point to calculate data_new. Then you do a logic operation on it (& 0x2000). This might be the source of error. You should convert from float to hex before your do bit manipulations. Also, you may not even have to use floating point...