Data transfer between fpga (14 bits) vhdl block to NIos II system (16 bits)

Ok, I thought I should make it simpler:

From vhdl, the data is the input to Nios.

data <= to_slv(resize(scale*to_sfixed(in, 0, -11), 9, -6));

"scale" is any number to represent the peak value, "in" is a sinusoidal waveform. "data" is the input to the Nios II.

In the C code, initially, I read the data from vhdl block using the C code below:

alt_16 data=0;
data =  IORD_ALTERA_AVALON_PIO_DATA(data_base);

After this, the Nios system do some calculation (multiply with "a" for instance, where a is not a constant depending on calculation on some other inputs) to give a new value of "data", say name it as "data_new".

data_new=(data)*(a);

After the calculation, I want to assign "data_new" back to another custom block in vhdl say "block b".

Finally, I write the "data_new" back to another custom block in vhdl say "block b".

IOWR_ALTERA_AVALON_PIO_DATA(data_new_base, data_new);

I am not getting the correct value of "data_new" fed to the fpga, what could be the causes? timing issue? clock? What aspects can I look into?