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Altera_Forum's avatar
Altera_Forum
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21 years ago

Data Cache

I was looking at the documentation, and found that address bit 31 is used to determine cache and non-cachable memory. When bit 31 is low is the memory/IO cachable, or is it non-cachable? Didn't...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
21 years ago

Just a thought that BadOmen might be able to answer,

Why not have the facility to specify non zero based memory. Then with the addition of a write through location zero exception you'd be able to detect

and trap misbehaving code that accidentally accesses location zero?

Maybe not a necessary feature on perfect code but something useful I've found

on other embedded processors such as Fujitsu F2C series.

Regards...