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Altera_Forum
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21 years ago

Data Cache

I was looking at the documentation, and found that address bit 31 is used to determine cache and non-cachable memory. When bit 31 is low is the memory/IO cachable, or is it non-cachable? Didn't...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
21 years ago

The first 2GB of address space is cached. The second 2GB is non-cached. These are not two seperate memory spaces or anything so there is a total of 2GB of address space (mirrored memory).

In other words address 0x00000000 (cachable) maps to address 0x8000000 (non-cachable)

" " " " " " 0x00000001 " " " " " " " " 0x8000001 (and so on .....)

So use the first 2GB for non-peripheral access (local memory), and the second 2GB for peripherals (use IORD and IOWR for this type of access so that you don't really need to know what's going on)