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Altera_Forum's avatar
Altera_Forum
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21 years ago

Data Bus Width

I need to put two 128k X 16 SRAMS on a 32 bit avalon tri bus. This bus will also be shared with a 1Mx16 FLASH and a 32k X 8 EEPROM. I want to use the interface to custom logic - avalon memory slave...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
21 years ago

Tell SOPC Builder that your two SRAMs are really one, 32-bits wide. The data bus will get that much wider. You should then get four byte-enables, of which two would go to the low SRAM and two to the high SRAM. The chip-select to SRAM should be shared between both chips in this case.

PS: Ensure that both SRAMs are in fact driving separate 16-bit busses on your board before sharing the CS... lest some IO buffers fry.