Forum Discussion
Altera_Forum
Honored Contributor
13 years agoOK. I set the reset vector to cfi_flash.s1 and the exception vector to onchip_ram.s1. The addresses will be automatically set by "Assign Base Address". Consequently I don't change them.
Then I generate this system. In Quartus project I open a new .bdf, instantiate the block diagramm of my system and connect the Inputs/Outputs (see in screenshot). In addition to that I add the .qip. After that I assign the pins as described in the reference manual (Cyclone 3 Starter Kit). When compiling the design I get "Can't place multiple pins assign to pin location H_3 error. Thus I go to Assignments -> Device -> Device and Pin Options -> Configuration site and select Passive Serial as Configuration Scheme. At the Dual-Purpose Pins site I set every pin to Use as regular I/O. Now I'm able to compile my project. Did I miss any step so far? Thanks again for your guidance.