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Altera_Forum
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19 years ago

Custom Logic Integration

Hey all,

I've got some custom logic with memory allocation, that is addressable through a NIOS II avalon entity. When executing code from within uClinux I notice strange behavior when writing to this area. When I carry out a write, I observe (through various probing techniques) a read being issued first. I'm assuming the kernel generates this.

Can someone explain why this would be and if the preceding read can be avoided?

Thanks again for any and all help,

Matt

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    19 years ago

    --- Quote Start ---

    originally posted by keplin@Apr 28 2006, 04:12 AM

    hey all,

    i've got some custom logic with memory allocation, that is addressable through a nios ii avalon entity. when executing code from within uclinux i notice strange behavior when writing to this area. when i carry out a write, i observe (through various probing techniques) a read being issued first. i'm assuming the kernel generates this.

    can someone explain why this would be and if the preceding read can be avoided?

    thanks again for any and all help,

    matt

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    --- quote end ---

    --- Quote End ---

    Did you use uncached I/O access or address?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    19 years ago

    Brilliant!!! I changed the address MSB of all my memory accesses through this custom logic to 1 to bypass data cache, and now everything is happy.

    Thanks Hippo!