Custom Instruction with Avalo Master Port

Hello All,

I try to create Custom Instruction with Avalon master port.

entity test is
  port (
    -- Custom Instruction Port
    clk_ci   : in   std_logic;
    clken_ci : in   std_logic;
    reset_ci : in   std_logic;
    start    : in   std_logic;
    done     : out  std_logic;
    dataa    : in   std_logic_vector(31 downto 0);
    datab    : in   std_logic_vector(31 downto 0);
    result   : out  std_logic_vector(31 downto 0);
    -- Avalon Master
    clk_a         : in  std_logic;
    reset_a       : in  std_logic;
    address       : out std_logic_vector(31 downto 0);
    be            : out std_logic_vector( 3 downto 0);
    waitrequest   : in  std_logic;
    read          : out std_logic;
    readdata      : in  std_logic_vector(31 downto 0);
    readdatavalid : in  std_logic;
    write         : out std_logic;
    writedata     : out std_logic_vector(31 downto 0)
  );
end test;
architecture RTL of test is
begin
...
end RTL;

The code is like this. and create SOPC Builder component using Component Editor. It seems that Component Editor is completed creating 2 ports - NiosII custom instruction port and Avalon Master port.

Bud SOPC Builder reports an error that this Master Port is not connected to any slaves. But also this Avalon Maser is not shown in SOPC Builder BUS.

One idea to avoid this is wiring 1 port out of this entity. But it is inconvenient.

Does anyone have idea to create such block?

Many Thanks,

koma