Forum Discussion
Altera_Forum
Honored Contributor
16 years agoCustom Instruction addition
Dear all For making the New component for custom instruction addition to Nios processor Five tabs are to be completed new system component, 1)introduction, 2)hdl files, 3)sig...
Altera_Forum
Honored Contributor
16 years agoHi Daixiwen
Thanks alot for clearing my doubt Ok i will correct the verilog code as you said I have made it according to the procedure defined but i see the multi cycle ports (start,done,clk_en) doesnt appear in the macro generated in the System.h file As they are defined as inputs and outputs they should appear in the macro Please help me out A similar problem is reported by some other friend keitall http://alteraforums.com/forum/showthread.php?t=20044 Regards M Kalyansrinivas