Honored Contributor
Honored Contributor--- quote start ---
hello;
i am new to this board and new to nios. i have however, worked for a few years with fpgas and embedded systems.
i have designed a board with three cyclones and one epc16 with jtag and byteblaster interface. all algorithm, interfaces, etc. have been developed in vhdl. now i need to add extra capabilities such as usb, uart, and ethernet to this board ( i can do it physically with a lot of io expansion possibilities).
so, i am wondering; if i can dump a small nios footprint to one of my cyclones, i should be able to add those extra features with much less overhead, and development time.
my question is, is this at all possible?[/b]
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in general, yes. however, you didn't say how much space in what kind of cyclone, and how much memory (ram and flash) is available to that nios. you're not getting tcp/ip support with just the internal cyclone memory; there's not enough. if you use ecos, you should probably be able to do it with about 512k flash and a 4-8 megs of ram (though i must admit that i have not tried to decrease the memory footprint of my ecos system; i've got a 128mb sodimm to play with). if you use linux, you'll need more flash than the epc16 has, so you'll need an external flash chip, and probably more ram, and it might be overkill.
the epc16 is tricky to use as a nios flash device, but it's possible; i've done it. the simplest thing to do is define it as a new component in sopc (it is not a cfi flash), then use the memory map file to figure out where the open space past the end of your cyclone configurations is, round up to the next 16-byte-aligned address, and set your reset location there. sopc builder will complain about the reset address not being 0, but ignore it.
<!--quotebegin-afshin@Oct 27 2005, 02:53 PM please forgive me for being so direct. --- Quote End --- Pertinent answers are usually obtained through impertinent questions. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/happy.gif
