Custom Component with Master & Slave ports

You can make it as show here:

CLASS user_logic_Camelot_Ethernet_Monitor
{
   ASSOCIATED_FILES 
   {
      Add_Program = "";
      Edit_Program = "";
      Generator_Program = "mk_user_logic_Camelot_Ethernet_Monitor.pl";
   }
   MODULE_DEFAULTS 
   {
      class = "user_logic_Camelot_Ethernet_Monitor";
      class_version = "2.0";
      SYSTEM_BUILDER_INFO 
      {
         Instantiate_In_System_Module = "1";
         Is_Enabled = "1";
         Date_Modified = "--unknown--";
      }
      WIZARD_SCRIPT_ARGUMENTS 
      {
      }
      PORT_WIRING 
      {
      }
      MASTER monitor_avalon_master
  {
            SYSTEM_BUILDER_INFO
     {
    Bus_Type = "avalon";
    Address_Width = "32";
  Max_Address_Width = "32";
  Data_Width = "32";
  Is_Enabled = "1";
          }
            PORT_WIRING
     {  
              PORT clk
              {
               width = "1";
               direction = "input";
               type = "clk";
              }
              PORT reset
              {
               width = "1";
               direction = "input";
               type = "reset";
              }
              PORT address
              {
               width = "32";
               direction = "output";
               type = "address";
              }
              PORT byteenable
              {
               width = "4";
               direction = "output";
               type = "byteenable";
              }
              PORT read
              {
               width = "1";
               direction = "output";
               type = "read";
              }
              PORT readdata
              {
               width = "32";
               direction = "input";
               type = "readdata";
              }
              PORT write
              {
               width = "1";
               direction = "output";
               type = "write";
              }
              PORT writedata
              {
               width = "32";
               direction = "output";
               type = "writedata";
              }
              PORT waitrequest
              {
               width = "1";
               direction = "input";
               type = "waitrequest";
              }
            }
         }
      SLAVE monitor_avalon_slave
  {  
     SYSTEM_BUILDER_INFO
     {
  Bus_Type = "avalon";
                Address_Alignment = "native";
                Address_Width = "2";
                Data_Width = "32";
                Has_IRQ = "1";
                Has_Base_Address = "1";
                Read_Wait_States = "0";
                Write_Wait_States = "0";
                Setup_Time = "0";
                Hold_Time = "0";
                Is_Memory_Device = "0";
                Uses_Tri_State_Data_Bus = "0";
                Is_Enabled = "1";
     }
     PORT_WIRING
     {
              PORT chipselect
              {
               width = "1";
               direction = "input";
               type = "chipselect";
              }
              PORT saddress
              {
               width = "2";
               direction = "input";
               type = "address";
              }
              PORT irq
              {
               width = "1";
               direction = "output";
               type = "irq";
              }
              PORT swrite
              {
               width = "1";
               direction = "input";
               type = "write";
              }
              PORT swritedata
              {
               width = "32";
               direction = "input";
               type = "writedata";
              }
           }
         }
   }
   USER_INTERFACE 
   {
      USER_LABELS 
      {
         name = "Camelot_Ethernet_Monitor";
         technology = "Camelot";
      }
   }
   DEFAULT_GENERATOR 
   {
      top_module_name = "monitor";
      black_box = "0";
      vhdl_synthesis_files = "";
      verilog_synthesis_files = "monitor.v";
      black_box_files = "";
   }
}