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Just make your readdata and writedata signals 32 bits. It doesn't matter if you are only using bits 0-7. You can then ignore the byteenable and avoid the 3 "extra" non-functional read/writes.[/b]
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That makes sense on the hardware side, but in the Nios IDE I don't see how it would work. When I call the IOWR macro for example, doesn't the input data need to match up to the bit width of the component data bus? How would I use the IOWR/IORD functions to use only the lowest byte of the 4 byte value?