Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Crash

Hi, some months ago I made a program in C++ in MicroC/OS-II installed on FPGA programmed with NIOS processor on Altera board. The software was composed of three threads that mad...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

I suspect the code spends most of its time blocked waiting for the JTAG uart inside 'cout' - This probably isn't the intention of the test!