cpu/avalon bug ?

Hi bigboss25,

this behavioral is absolutly correct.

if you read the avalon documentation you will notice that a read from nios is always 32bit regardless if the software does a byte (8bit) word (16bit) or long (32bit) access. the "unwanted" bits are not used.

this is so. you have to live with that and maybe need some workarounds.

i had these problems too in the past but nowadays all sopc modules are fully 32bit as nios is a 32bit core.

try to change your module to 32bit and use the information that is inside the byteenables as they also show which 8bit are accessed like they do on write cycles. this workwaround works fine with quartus 6.0sp1 but i am not shure if it will in the future. but this works only with io commands like ldbio.

i had to "modify" my thoughts to design 32bit sopc modules even if the design inside is 8 bit. even all avalon masters are 32bit now and i do the 32-8bit conversion inside the module.

but this behavioral of reading more than selected by software is realy a pain if you try to attach an 8bit external device to a tristate bridge.

hope this helps you.

Michael Schmitt