CPU hangs after SDRAM refresh

Hi Mike,

I have tried to figure out your screen-shots, but I am not sure if I understood your design right. If I am correct you have implemented your own avalon-master (the "DSP"). I have used to SDRAM-controller successfully with NIOS-designs and had no problems (at least not of this kind ;-). So maybe you should recheck your own avalon-master interface. (I have never implemented one, so I do not know if there are any pit falls...).

Of course it is also possible that there is a bug in the SDRAM-controller / avalon-switch-fabric that occurs only in your special case.

Regards,

Thomas

P.S.: Nach dem Motto: "Ein Ing.-Buero hilft dem anderen :-)"