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Honored Contributor
Honored Contributor[CPLD_config]cannot config CycloneII
We config the cyclone (EP1C6) successfully using CPLD(EMP3128). (CPLD read from Flash and config FPGA by PS mode, in 3.125MHz like Altera NiosII Kit) So we just modify a little to config cyclone I...
Altera_ForumHonored Contributor
Honored ContributorAt last , I make it work by DCLK pulled low("0") after CONFIG_DONE='1' while it was high ("1") at first.
