Could not read 8 bit data from custom ram

I would recommend making your slave have 32 data bits - even if the top 24 are ignored on writes and return 0 on reads.

An 8 bit slave will always see 4 bus cycles when the NIOS doe a byte access to it.

On writes three of theses will have the byte enable de-asserted.

However the NIOS always asserts all 4 byte enables on reads - so you'll see 4 separate read cycles for each cpu byte read.