Forum Discussion
Altera_Forum
Honored Contributor
13 years ago --- Quote Start --- i believe your error is that there should be a read wait state. just as an fyi, there is no reason to use the read signal, you could have just always assigned readdata to the ram[address]. --- Quote End --- thank dwesterg, did u mean i would bypass the read signal, just simple assign data like:
begin
readdata <= RAM_CONTENT(conv_integer(address));
process(...) -- for writing data
...
end process;
end behav;
i will do a try :) and report in this thread, thanks again :x