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Altera_Forum
Honored Contributor
22 years agoConnect different WR#/RD# signals together
Hello, When placing for example ext_ram (IDT71V416), ext_flash (Flash memory with CFI) and lan_91C111 (LAN91C111 Interface) in the SOPC Builder to one Master (cpu) the builder will create diffe...
Altera_Forum
Honored Contributor
22 years agoI´m not shure but I think,
"ext_ram_bus_read_n" should be a signal, which is low if any read access is on the bus, normally you should can connect this signal as a shared signal to all three devices. if there is another write signal in your system, which is marked as shared, then you will also get a signal ext_ram_bus_write_n, which is low if there is a write access to the bus, this signal can also be connected to all devices. , so it should not be necessary to "and" the signals together. You can check the ptf files of the devices to see if the write/read signals are marked as shared. to see the path to the ptf file, right click the component in the tree view and see "Component Details" I hope there will also be an answer from an altera expert.