Honored Contributor
Honored ContributorYou seem to be making pretty much advanced applications. I tried to start from the simple steps first. Meaning, I am trying to incorporate a higher-level control-supervision to my FPGA projects which include VHDL code for PWM, ADC control and some other low level functionality. So what I would like is a very small tutorial on how to incorporate a small software together with Nios to my VHDL projects (available at boot - so EEPROM saved).
In general the Nios platform in my application will just accept and deliver some parallel ports to the rest of the VHDL system and enable/disable VHDL functionality, provide some real time debugging through UART, maybe implement some 7-segment display, LCD, and very simple USB or Ethernet communication. Apart from all these I would like to have some ideas on memory strategy like where to store the program, the data, the general FPGA configuration bitstream, etc. Also maybe it would be better to save the main program in an external EEPROM and configure a small part of the on-chip RAM with a small software to go and copy the main program from the External EEPROM to another External SDRAM and run the main program from there (faster?). Just ideas...... My main problem now is to incorporate a basic NiosII (e version) plus a small program, to the whole FPGA configuration file with the rest of my VHDL code, save it to an external EEPROM and configure the whole thing at power-on. THANKS IN ADVANCE!
