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Altera_Forum's avatar
Altera_Forum
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15 years ago

Configuring DMA to write to Two memories

We have to write a set of data (data will be defined while proramming NIOS) to two different memories (the same data will be written to both). We want to use DMA for this purpose. How should we configure the DMA for this purpose.

The data might also be defined in the on-chip NIOS memory. If this is possible, please explain how we can do this also. Or suggest some tutorial or example.

The question might sound very simple and silly to some, but we are new to NIOS, so we are not sure how to do this. Any response in this regard is highly appreciated. Thanks.

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    If you write the data you obtain while running the program in the on-chip memory (using IOWR(_32DIRECT) and IORD(_32DIRECT)) macros. You can simply use 2 DMA controllers to copy the data from the on-chip memory to the 2 different memories.

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    --- Quote Start ---

    If you write the data you obtain while running the program in the on-chip memory (using IOWR(_32DIRECT) and IORD(_32DIRECT)) macros. You can simply use 2 DMA controllers to copy the data from the on-chip memory to the 2 different memories.

    --- Quote End ---

    One clarification.... the data is to be pre-defined by the programmer.

    So, I should configure the on-chip memory as the master read port for the DMA and the target memory as the master write. Right? As the same data also has to be written to another memory, so can I define the second memory as the slave write?

    Thanks for your time
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    A DMA controller has 2 master ports, one master read and one master write. You want to copy data from one address to two separate addresses. So you will need 2 DMA controllers (as far as I know). As they will both be reading form the same on-chip memory, they should be connected like this.

    on-chip memory_1[S] -> [M read]DMA_1[M write] -> [S] target memory_1

    on-chip memory_1[S] -> [M read]DMA_2[M write] -> [S] target memory_2

    http://www.altera.com/literature/ug/ug_embedded_ip.pdf