compact flash

Hi Banx,

I'm using Altera's cf component in SOPC Builder, and there are no bus-timing parameters exposed when the component is instantiated. Presumably, this means that I may hit the timing problem with larger cards in the future?

Another thing is puzzling me, I don't understand why one needs to be able to switch power to the cf card if it is always to be used in true IDE mode? The Altera DSP kit uses a power mosfet and you have explained that you use a switchable 3.3V regulator driven from 5V. The cf spec says that a cf card samples the atasel# line on pin 9 on the transition from power off to power on; if atasel# is low the cf card is in IDE mode. I'm only using my cf card to be an IDE disc for my system, so I reasoned that I ought to be able to throw out the mosfet/switchable regulator on the target board that I'm designing and just permanently connect the cf card to Vcc=3.3V. However, I've just done a test on my DSP kit by forcing the cf power to be always on by going,

assign cf_power=1'b1

assign cf_atasel=1'b0;//Forced atasel low after reading Nios II 6.0 errata.pdf

and the Nios II IDE cf example that shipped with the DSP kit (essentially Jesse's software I think) says that it cannot initialize the cf. However, if I allow the cf_power signal free to toggle, the cf card works.

stebla