Forum Discussion
Altera_Forum
Honored Contributor
11 years agoDave,
HI, in my application I would have a process that has real-time priority. The processor would run in a loop that executes every 300usec. During that time it would receive data from the FPGA side, process the data and then DMA the data to a PCIe channel. The DMA should occur at or very near the same time for every 300usec loop, such as at 150usec within the 300usec loop. Can any RTOS run with this types of constraints? Thanks, joe