Forum Discussion
Altera_Forum
Honored Contributor
15 years ago --- Quote Start --- Linker places in TCM all data you tell him to place there. Have you specified any? --- Quote End --- I don't know how. Do you mean that following lines of code ? If yes, where it belongs ? # Locate the exception stack to tightly coupled data memory. set_setting hal.linker.enable_exception_stack TRUE set_setting hal.linker.exception_stack_memory_region_name tightly_coupled_data_memory. aset_setting hal.linker.exception_stack_size 1024 --- Quote Start --- If ISR function is that short I wouldn't expect great performance improvements with TTC. Probably most of the performance losses are due to ISR dispatcher. For longer functions I REALLY DO have about 30% execution speed improvements. --- Quote End --- So there are no performance improvements expected ? My program code isn't that big and the cache size is 8kbyte. I'm thinking that the ISR already lies in the on-chip ram. What can I expect when i use a seperated expection stack ? The paper mentioned some overhead. Is the tightly coupled data memory only for a seperated exception stack needed ? Thanks Regards,