clock edge help!

hi everybody!

I'm working in modelsim verilog for 2weeks now, and i need some help.

i used before to work on vhdl which functions as verilog.

what i want to do is an adder (x+y=z ) with a call system to a C code and check the result with the hardware one. (it's called transaction based verification)

i already do it and it perfectly functions .

the next step for me where i found some problems is to make the adder functions on clock edge.

here's what i did :

module Add_Hard(

clock,

x,

y,

z

);

input clock;

input[7:0] x;

input[7:0] y;

output[8:0] z;

//wire[7:0] x;

//wire[7:0] y;

reg[8:0] z; //declared as register because the value changes

//during the always process

wire[8:0] res;

reg clock;

initial clock=1;

assign res=x+y ;

initial begin

clock=1;

end

always @(clock) begin

z = res; //z_hard

end

endmodule // End of Module Add_hard

//test bench

module Add_vpi_tb_clock();

reg clock;

reg[7:0] x1;

reg[7:0] y1;

wire[8:0] z_hard;

reg[8:0] z_soft;

reg[8:0] INT_z_hard;

Add_Hard inst_Add(

.clock(clock),

.x(x1),

.y(y1),

.z(z_hard) //z_hard output

);

//always# 1 clock = ! clock;

initial begin

clock=1;

@(posedge clock)

$display("clock:%d",clock);

x1= $random;

y1= $random;

$Add_vpi(x1,y1,z_soft);

assign INT_z_hard = z_hard;

$Display_compare(INT_z_hard);

# 100 $finish;

end

always# 2 clock = !clock;

endmodule

could any one help me doing the clock functionnality.

thks all