Honored Contributor
Honored Contributorslacker,
my problem is not generating a running system. It all runs. The problem only arises, when debugger loads and tries to verify parts of program data. I think there is a malfunction of this download, because the section, which is compiled and linked at address 0 (restart vector is set to EPCS) is originally programmed into EPCS but at a higher address. At address 0 there is FPGA configuration. So, when launching debugger, the verify process should skip EPCS data, because its contents is relocated by the boot-copier, as you described and not placed at the address its origin (from .elf file) suggests. And this problem is new since Version 5.0. Jesse has posted an explanation of this issue in ... parallel topic (http://www.niosforum.com/forum/index.php?act=st&f=2&t=1752). Thanks for your hints Mike
