Mike,
If you're using the default EPCS controller, it doesn't allow linear access to the EPCS's contents and only contains some bootloader code (in onchip memory). Take a look at your memory map, for the controller, and you'll see what I mean.
I had this misunderstanding when I first looked at the EPCS controller, as well. Please read the docs. on the EPCS controller. Oh yeah, because of this, it will not be possible to run code from the EPCS controller, which _may_ be what you're trying to do.
There is a 3rd. party EPCS controller, available here (
http://www.fpga.nl/ipcores.html), which should allow you to "see" the contents of the cpu's masters to "see" the EPCS, in a linear fashion.
Cheers,
- slacker