Honored ContributorI'm using SDRAM controller to write data into it. However, it seems that the Nios II CPU can only address 4K space of it, no matter where it is starting from. The SDRAM I'm using is MT48LC4M32B2, which is 128Mb. This wired phenomenon happens when I use DMA transfer or direct addressing. I don't why I can't use all the space of the SDRAM. Can anyong give me a hint? Thank you in advance.
Honored ContributorCan you post a screenshot of your SoPC system? The NIOS is certainly capable of addressing all of that RAM. You've got something else wrong.
JakeHonored ContributorHi, Jake, please see the attached picture. Last night, I found that it might be limited by the burst length of DMA I used. I'd like to know if it is possible to transfer any length of data to SDRAM if I disable burst mode of DMA.
In the picture, the "ad_buf" is my own module, a source buffer which generate data continuously. I'm trying to transfer data in "ad_buf" to my PC using Ethernet. Since my board only support 10/100 Mbps, the "ad_buf" has the data rate of 160 Mbps or higher, I plan to store the data as much on the SDRAM as possible using DMA, and then transfer the data in SDRAM to PC using Ethernet. Though some data will lost, a block of data in SDRAM I get is supposed to be continuous and error-free. Now, I met another problem: when I call dma transfer function and udp function serval times, the Ethernet controller cannot autonegotiate successfully or no data will transfer to PC when it autonegotiate successfully. I'm considering the reason is interrupt confliction. I'm not sure about this. Could you please give me some ideas? Thank you very much!
