New ContributorA university project may use NIOS.
This projects may want to tapeout later on.
Can the NIOS, as configured, be used as Verilog RTL outside the DE10 Lite board for an actual tapeout?
Is it possible technically? And even if yes, is there any legal limitation? Is it freeware?
Hello,
We do not provide the source code of Nios V outside Quartus Prime tools. You can use it with Altera FPGA products.
Thank you
Frequent ContributorHello,
We do not provide the source code of Nios V outside Quartus Prime tools. You can use it with Altera FPGA products.
Thank you
ModeratorHi @YigalB1,
Good day, just following up on the previous clarification.
By any chances did you managed to look into it?
Hope to hear from you soon.
Best Wishes
BB
ModeratorHi @YigalB1,
As thread has been marked with solution we would assume that challenge are overcome, with no further clarification on this thread, it will be transitioned to community support for further help on doubts in this thread.
Please login to ‘ https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
Thank you for the questions and as always pleasure having you here.
Best Wishes
BB
