I am not the uClinux expert but can tell you this: Try turning on the icache - that should be completely transparent to the sotware that is running. Adding dcache is *not* transparent.
The software that running must ensure that cache coherency is managed by: mallocing buffers as un-cachable, flushing the cache to external memory, or doing direct (cache-bypassed) IO reads and writes as necessary... I would imagine that the linux port & drivers already have taken care of this but one of the Microtronix guys can probably confirm it.