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The whole C to hardware idea doesn't really work. You end up with much more FPGA resource being used than would have been the case if it had been implemented using proper techniques in a hardware description language (HDL) such as Verilog, System Verilog or VHDL.
The Altera C2H compiler was an extra cost add on product that wasn't available in the free Quartus editions. The modern version is Altera SDK for OpenCL. I think it automates more than the old C2H compiler did, but I'm not sure because I haven't used them.
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C2H is a bit different from openCL. Open CL requires a CPU controller for the system, C2H is a replacement for HDL. Xilinx do a fairly good job with C to HDL, if you write the C correctly. It is also great for rapid prototyping.
While I agree HDL should always give the optimum solution. OpenCL and C2H opens the markets much wider to software programmers and gives existing hardware designers the ability to create a firmware based solution very quickly, which may not be optimal, but at least it is something that will work and may be good enough for some.