Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
19 years ago

BootLoader in Onchip memory in altera/nios

Hello,

I want to put the boot_loader in my Nios Projet in the onchip memory.(I found it here "D:\altera\nios2_60\components\altera_nios2\sdk\src\boot_loader_sources\" )

But How I can do this?

-The onchip memory must be set in ram or rom mode?

-what I must do change in the "boot_loader" file to set correctly for my projet.?

-how can I use these files in my project? (there are a ".S" file or ".h" etc...)

My final program will be put in my ram with Nios IDE (if it possible).

So in my project ,I have the "onchipmemory" and the "Ram" .

And I want to jump from altera (with boot) to my program in the ram.

Our ram is an "interface To User Logic" with "bus interface type" = avalon memory Slave (connect with our Ram component) , and we have to another ram "IDT71V416 SRAM".

My Nios Cpu is set in Nios II/e or Nios II/s with jtag debug module in level 1.

So ,I want to put the boot_loader in my onchipmemory and my program in my Ram (which one from interface to User logic).

Thanks for your help.

Benoît

P.S.:is that clear ? I'm french and not very good in english ^^

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    19 years ago

    --- Quote Start ---

    originally posted by exterminabur+feb 28 2007, 02:55 am--><div class='quotetop'>quote (exterminabur @ feb 28 2007, 02:55 am)</div>

    --- quote start ---

    <!--quotebegin-l.robinson@Feb 27 2007, 06:35 PM

    look here for some guidance:

    http://nioswiki.jot.com/wikihome/bootloaderflashexample (http://nioswiki.jot.com/wikihome/bootloaderflashexample)

    <div align='right'><{post_snapback}> (index.php?act=findpost&pid=21911)

    --- quote end ---

    --- Quote End ---

    thx

    I look that and I try it soon

    <div align='right'><{post_snapback}> (index.php?act=findpost&pid=21920)</div>

    [/b]

    --- Quote End ---

    Hi, Exterminabur,

    I&#39;m french too. Your nickname suggests me that you love "Les Inconnus" http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/biggrin.gif

    Funny.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Currently my application resides in external flash and then bootloads from flash to external sram at power on.

    My goal, however, is to boot entirely from on-chip memory (.bss, .heap, .rodata, .rwdata, .stack, .text), have the bootloader verify the integrity of an external sram, and then if ok, bootload from flash into the external sram just like before.

    Do I need 2 separate SOPC files (one for the bootload app, and another for the main app)? For example...

    1)

    I know the CPU's reset (in SOPC) needs to change from pointing to external flash, to on-chip memory. However, if I set the exception memory to also point to on-chip memory, what happens if I want my main application to have the .exceptions area to be in external sram?

    Maybe its preferable for the bootloader app and main app to have the same exception address to keep the same SOPC? Although I'm not using any interrupts in the bootloader, I assume it's not a good idea for the exception pointer to point to external sram, since the bootloader will be testing that memory.

    2)

    The bootloader's linker settings should be set entirely for on-chip memory correct? (The resulting elf code is converted to a .hex file (elf2hex) and used as the Memory Initialization File for the on-chip memory (in SOPC))

    The main application's linker setting should be set entirely for external sram correct? (The resulting elf code is flashed directly (elf2flash))

    3)

    Assuming one SOPC for the bootloader, and another for the map app...

    In SOPC1: Point Reset / Exceptions to Onchip Memory.

    Build Nios project with memory sections all pointing to on-chip memory. Synthesize using resulting .hex MIF.

    In SOPC2: Point Reset to External Flash, and Exception to External SRAM,

    Build Nios project with memory sections all pointing to external sram

    Flash the resulting build (which will automatically have a bootloader inserted)

    At power on, the onchip bootloader will do the memory test, and the code will then jump to external flash.

    This should work too, right? Jumping from on-chip ram to my current app in the external flash is the same as if the reset vector on the cpu would have jumped directly, no?

    Thanks!