booting a dual NIOS II

When creating the cpus under the more "cpu" settings, you have to specify the Reset Address and Exception Address. Reset is where in flash you put your program and Exception is where you want to execute from (target device like onchip ram or sram). I choose cpu 1 to boot from ext_flash at 0 and run from sram at device address + 0x20. The second cpu boots from ext_flash at 0x00200000 (where i put the second executable using the flash programmer) and runs from onchip at device address + 0x20. In my project settings under NIOS II IDE I choose the cpu 1 system lib to reside in ext_ram with normal library settings. Cpu 2 lib resides in onchip and I chose small C lib support to fit the program into 64K. I used the flash programmer to put cpu1 code into flash at 0 along with the FPGA image and then put cpu2 code into flash at 0x200000. I've had pretty good success with 2 cores. Adding Dual Port Ram and multiple serial ports has given me some grief - like my second cpu stops booting or DPR doesn't work consistently - stuff like that. But overall, it's pretty cool. You should probably read Kerri's post on adding the second core and setting up the environment correctly - this entry just builds on her post.