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Honored Contributor
Honored Contributorboot NIOS from EPCS flash and use SDRAM to store instructions and data
Hi! In the qsys I have: 1. Clock Source 2. On-Chip Memory 3. Nios II Processor 4. System ID 5. JTAG UART 6. EPCS Serial Flash Controller 7. PIO 8. SDRAM Controller I want to use...
Altera_ForumHonored Contributor
Honored ContributorSince the FGPA hardware doesn't access your second EPCS16 chip, you could actually write the nios code image to it in any format you like!
You can then write some boot code to copy it to SDRAM and put that into an internal memory block that is initialised when the fpga image is loaded (and is pointed to by the nios's reset vector). Since you can link the boot code to the correct address it should be easy to write!
