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Altera_Forum
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13 years ago

boot NIOS from EPCS flash and use SDRAM to store instructions and data

Hi! In the qsys I have: 1. Clock Source 2. On-Chip Memory 3. Nios II Processor 4. System ID 5. JTAG UART 6. EPCS Serial Flash Controller 7. PIO 8. SDRAM Controller I want to use...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

If you can debug the firmware whitin the sdram it should work correct. Before debugging the debugger performs a verify of your code stored in the sdram.

The EPCS Controller executes after startup a small piece of code the boot loader. (file your_sopc_epcs_controller_boot_rom_synth.hex in the sopc subdirectories)

How does the boot loader know from which EPCS the code should be loaded?

Jens