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Altera_Forum
Honored Contributor
Honored Contributorboot NIOS from EPCS flash and use SDRAM to store instructions and data
Hi! In the qsys I have: 1. Clock Source 2. On-Chip Memory 3. Nios II Processor 4. System ID 5. JTAG UART 6. EPCS Serial Flash Controller 7. PIO 8. SDRAM Controller I want to use...
Altera_ForumHonored Contributor
Honored ContributorThank you for your reply! I have two EPCS devices, I use first to configure FPGA, and second to store NIOS program. Maybe it not start because SDRAM pins not enabled with the Fast Input Register and Fast Output Register logic options or PLL is tuned incorrectly? ("Symptoms of an Untuned PLL" p.2-11 in Embedded Peripherals IP User Guide)
