Honored Contributor
Honored ContributorUsually the boot sequence is the following one:
- fpga configures from the factory hardware image - the nios system defined inside the factory hw boots the factory software - the factory software tests the dip switches (or whatever you use to select user application) and load the user configuration from the proper flash address. Before this phase usually the factory sw also starts a watchdog timer which pulls back fpga into factory configuration if anything goes wrong. - after the user configuration becomes active, it boots the user software image, loading it from the flash. The flash address is defined inside the nios system and must mutch the one where the sw image is actually stored. - the sw bootloader takes care of transferring flash image data to the required memory devices (onchip ram, sdram, ...) - if user sw is running properly, it clears the watchdog periodically (or disables it).
