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Altera_Forum
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14 years ago

Bit or byte swapping in SDRAM?

Hi, I have an Avalon-ST component sending data to an on-chip FIFO (ST input / MM output), which is read by a Nios CPU. I've verified that the data coming out of my component is valid both on a...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

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What am I doing wrong here?

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Have you written a testbench? If not, you should.

Demonstrate the issue in a testbench and post an image of the Modelsim screen shot, or a PDF, along with the code.

That'll help clarify what you are trying to describe.

Cheers,

Dave