Bios & Boot doubts...

Hi all,

I'm working on a system with a Nios processor running in a Cyclone II device.

My FPGA's hw is so configured:

- Nios II

- OnChipMemory (4K)

- SDRAM controller (8M)

- PCI Compiler (32-bit 33MHz target)

- other peripherals

The Cyclone II is configured in PS mode by an external CPU, that also initializes SDRAM contents through PCI bus.

Nios II has reset address in OnChipMemory, exception address is in external SDRAM.

My goal is boot Nios in OnChipMemory, wait for firmware is loaded into SDRAM from the external PCI host and then jump with program execution in SDRAM.

I already wrote both loader and firmware, and I have them running in two different Nios IDE projects, the first is configured (Sys Lib Options) to reside in OnChipMemory, the other in SDRAM.

My doubt is about how to get from IDE the binary file to be copied in SDRAM (the firmware binary image) and choosing the right address to jump in. I also need to understand what is SDRAM space I can use to communicate with bios, that is space where I can write a signature checked by bios to understand that SDRAM content is loaded, followed by the address to jump in.

To obtain the binary Image from the .elf file, I've tried with

nios2-elf-objcopy -O binary ...

but data in the addresses in the file I obtain are not aligned with the content of SDRAM I can see from debugger. What I see at the beginning of file is memory's content starting from 0x20.

Where to Jump? I think program has to jump to _start section, obtained from memory map file generated by linker (with -wl,-map -wl,memory.map cmd line parameters), is it right? I also have to setup stack pointer or not? Starting from that point is all the C setup code correctly executed in you opinion?

Any suggestion about bios structure is welcome. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/wink.gif

Thanks in advance.

Paolo