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Manprocoder's avatar
Manprocoder
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1 year ago

AXI4 DMA Master Error

Hi expert, I am building SoC system that includes components as follows: + CPU + onchip_memory_2_0 + onchip_memory_2_1 (source address) + onchip_memory_2_2 (destination address) + IP (Active As...
Nios Cpu
Manprocoder's avatar
Manprocoder
Icon for New Contributor rankNew Contributor
1 year ago

Hi experts,

I provide additional details (waveform and C code) to facilitate your supports.

+Quartus Version: Quartus Prime Lite 18.1

+Board: 5CSXFC6D6F31C6 (DE10 Standard)

As I mentioned READ BURST request runs well (handshake arvalid & arready)

Read Waveform:

But WRITE BURST request always encounter problem (no handshake awvalid & awready)

Write Waveform:

C code program: