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Altera_Forum
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16 years ago

Avalon tristate slave timing control

Hi, I am designing an interface to byte wide Nand Flash using the avalon tristate slave interface. One issue I have run into is that the flash comes up in a slow interface timing mode until it...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Keeping the write cycles separated in software would still violate the setup and pulse width timing, but I did find a solution by adding a second tristate slave interface with the required wait & hold states to operate the flash at the slow speed. I then mux the control signals to the flash. I think I will do something similar to get the single byte read functionality.