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Honored Contributor
Honored ContributorAvalon Slave IP with Interrupt Receiver
We are trying to design an avalon slave that listens on the irq lines that are connected to the nios cpu. This slave should later on be able to count the individual irq's and freeze the nios w...
Altera_ForumHonored Contributor
Honored Contributorunfortunately only the nios has a DUT declaration.
the more i go through the altera docs the more i think that i will need a data master to gain access to the interrupt receiver functionality. a data master must be connected to an avalon slave, otherwise sopc builder will report an error. so this data master will only gain access to my avalon slave on its own avs (avalon valid slave) port without waitrequests and the nios will access via another avs with waitrequests to stall the nios until an irq occours. so this sopc module will have these ports avm to get the interrupt receiver functions avs for the avs without waitrequest avs for nios with waitrequest.
