Avalon Slave IP with Interrupt Receiver

Look at the bottom of the SOPC generated file and look at the simulation DUT instantiation, and you can find the names of all signals that are passed to your avalon module. I've never used an interrupt receiver, but I would image there is a signal that represents the irq's coming into your module. If the interrupt receiver has to be associated with an avalon slave, I believe the signals will be routed to your top-level avalon IP module inside the SOPC generated system file.

If not, and you need to declare a master, you have this option:

Since you are really not doing anything with your interrupt receiver and just want to monitor the signals, you can create a simple dummy master that takes the two signals in, and add two exported output signals. In the dummy master module, assign the output signals to the irq input signals coming into the master. Then create two more inputs in your avalon slave IP. In your top level module, you will pass two declared wires to both your dummy master, and your avalon IP, so you can gain access to these irq signals in your avalon IP.

This is pure speculation, but hopefully it gives you ideas.